Quantum Computing News

Fused Silica Ion Traps Pave Way for Scalable Quantum Computing

Pioneering research has shown a unique multi-layer ion trap constructed on a fused silica substrate, displaying lower power dissipation and enhanced performance compared to standard silicon-based designs. This represents a critical step towards the realization of practical quantum computers. This development directly tackles important constraints in existing fabrication techniques, especially those pertaining to manufacturing quality and power consumption, which are essential for increasing the complexity and dependability of quantum computing systems.

Researchers from Alpine Quantum Technologies GmbH, the University of Innsbruck, the University of Graz, the Austrian Academy of Sciences, and Infineon Technologies Austria AG are part of the team that collaborated on this invention. Their research on the electrical characteristics of the trap, such as integrated temperature sensing down to 10 K and the measurement of electric field noise using a single trapped ion as a sensitive probe, is described “Test and characterization of multilayer ion traps on fused silica.”

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Overcoming Silicon’s Hurdles

For scaling quantum systems, traditional ion traps which are frequently etched into silicon substrates have posed significant engineering challenges. The intrinsic material constraints of these traditional designs lead to higher power dissipation and higher electric field noise, which in turn deteriorate qubit coherence (the amount of time a qubit retains its quantum states) and reduce the fidelity of quantum operations.

In addition, silicon’s dense spectrum of two-level systems (TLS), higher dielectric loss, poorer coefficient-of-thermal-expansion (CTE) match to metallic layers, and opaque behavior in the near-infrared spectrum all make it difficult to maintain qubit stability and performance. In the cryogenic conditions required for quantum processors, for example, a 40 mm, 50-ohm coplanar-waveguide line on silicon may drop by more than 1 dB, necessitating higher drive power.

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The Fused Silica Advantage

A notable divergence from these traditional designs is the switch to a fused silica substrate, which provides a particularly advantageous combination of characteristics. Because fused silica, an ultra-pure version of amorphous silicon dioxide (SiO₂), has a far lower dielectric loss than silicon, power dissipation is greatly reduced and system efficiency is increased. The loss tangent of fused silica is about five times lower than that of high-resistivity silicon at 5 GHz and room temperature.

This results in significant energy savings because less drive power is required due to the decreased loss, which is important in dilute refrigerators where every microwatt counts. Additionally, by decreasing the participation ratio of lossy dielectrics in qubit capacitors, lower dielectric loss directly increases the relaxation time (T₁) of qubits.

Fused silica provides near-zero thermal expansion in addition to power efficiency, guaranteeing remarkable dimensional stability. For instance, when cooled from 300 K to 20 mK, a 25 mm interposer shrinks by just 9 µm, easing restrictions on bump-bond pitch and through-silicon via (TSV) diameter and preventing plastic deformation in metallic columns. According to reliability tests conducted at MIT Lincoln Laboratory, it is possible to achieve more than 10,000 heat cycles without the need for via-to-metal delamination.

Enhanced Design and Integration

With the use of photolithography and etching processes, the trap’s multi-layer architecture allows for complex electrode geometries that are essential for accurate ion confinement and manipulation, providing more control over qubit interactions. The fabricated trap has integrated temperature sensors directly onto the substrate, enabling precise monitoring and control of the cryogenic environment necessary for minimising thermal noise and maintaining qubit stability. Qubit coherence requires accurate and stable ion environment control.

Moreover, fused silica is a perfect platform for incorporating photonic components because to its broadband optical transparency. Fused silica may support microwave structures on the reverse side and host waveguides, on-chip interferometers, and superconducting nanowire single-photon detectors with a transmission loss of less than 0.01 dB cm⁻¹ at 1310 nm. In order to get around wiring limitations, this capability supports the new roadmap that envisions qubits that are driven locally but read optically.

Through-Glass Vias and Robust Fabrication

The use of through-glass vias (TGVs), which are copper-filled at low temperatures and drilled using femtosecond lasers, is a noteworthy advance. The stacked qubit tiles and supporting densities needed for million-qubit device architectures are made possible by these TGVs’ remarkably low DC resistance (less than 10 mohm) and inductance (less than 20 pH), which make them appropriate for flux-bias lines or millivolt control signals.

A titanium adhesion layer, followed by molybdenum, copper, and gold, is the ideal metallisation stack. Post-plating annealing is used to enhance adhesion and lower stress. Performance is further improved by surface passivation that uses atomic layer deposition of aluminium oxide (AlO₃), which dramatically lowers the two-level system (TLS) density by about 20 times.

Automated wafer testing is a significant manufacturing process innovation that expedites fabrication and guarantees device stability before assembly. This creates a solid foundation for further research and development. Today, fused silica wafers with sub-nanometer surface roughness and a total thickness variation (TTV) of less than 5 µm are offered in 150 mm diameter. Foundries report bump-bond yields on interposers with 50 µm copper pillars that are higher than 99.8%. Accelerated-life studies reveal that fused silica interposers can exhibit radiation hardness up to 1 Mrad and surpass 10⁸ hours under powered RF stress, which is two orders of magnitude beyond standard telecom criteria.

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Future Prospects and Scalability

These findings mark a significant advancement in the development of ion trap quantum computers that are bigger, more reliable, and more scalable. Die warpage, which frequently affects traditional substrates, can be eliminated and microwave attenuation on important control lines reduced by up to 80% by using fused-silica interposers. In addition to looking into new electrode designs and control schemes, researchers are actively examining methods for scaling up the fabrication process, including as automated assembly techniques and improved lithography. The ultimate objective is to develop scalable and modular quantum processors that can tackle challenging issues in a variety of domains, such as financial modelling, medicine development, and materials science.

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A interdisciplinary strategy combining specialists in computer science, physics, engineering, and materials science is necessary to construct strong and dependable quantum computers. Accelerating the development and implementation of this game-changing technology requires cooperation between academic institutions and business partners. Developing effective and dependable control algorithms is crucial for manipulating qubits and carrying out intricate quantum computations, making the integration of classical control systems with the quantum processor another crucial topic.

In conclusion

Fused silica is showing great promise as a material for upcoming quantum processors since it combines the needs of photonics, mechanics, and electromagnetics into a single glass piece. This technology gives a competitive edge in attaining a useful quantum advantage by enabling greater qubit densities, clearer microwave spectra, and smooth optical integration.

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